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Bipolar transistors are biased to operate correctly. Biasing is the application of dc voltage in a circuit to establish a fixed level of voltage or current. The DC operating voltage or current conditions of a transistor is set to get the correct level. Then only the AC input signal can be amplified by the transistor correctly. To get the correct operating point, the bias resistors, load resistors must be properly selected which can provide the input current and collector voltage conditions. The different types of biasing circuits are given below.
It is the most commonly used biasing circuit. This is also called base bias. A single power source is used for collector and base of transistor. It is possible to use separate battery.
For Q-point at center, Vce =50%of Vcc
Ib = Ic /β
Vcc = IbRb + Vbe
By changing the value of Rb, the base current can be adjusted to achieve the desired value.
Then, Ib = (Vcc – Vbe)/ Rb
The Vbe does not vary during use.
The Vcc has a fixed value, for selecting Rb; the value of Ib is taken as fixed. Hence the circuit is called fixed bias circuit.
From the circuit,
Vcc = IcRc + Vce
So,
Vce = Vcc – IcRc
For example, Consider Vcc= 10V, Vbe = 0.7V, Ic = 5mA and β= 250
Vce = 50% of Vcc = 50* (10/100) =5V
Ib = Ic/ β = 5mA/250 = 20 microAmperes.
Rb = (Vcc – Vbe)/Ib = (10-0.7)/20*10^-6 = 470 Kohm
Rc= (Vcc – Vce)/ Ic = (10-5)/ 5*10^-3 = 1Kohm
It is used to stabilize the operating point and have negative feedback to avoid thermal runaway. Instead of connecting the base resistor to power supply Vcc, it is connected to the collector of the transistor. This is mostly used for stabilizing the operating point against temperature changes. So any thermal runaway can induce voltage drops across collector resistor.
For Q-point at the center, Vce = 50% of Vcc
Ib = Ic/ β
Rb = (Vcc- Vbe- IcRc)/Ib
Rc = (Vcc- Vce)/ Ic
For example, Consider Vcc=10V, Vbe= 0.7V, Ic= 5mA and β=250
Vce= 50% of Vcc = 5V
Ib = Ic/ β =20microamperes
Rb= (Vcc- Vbe – IcRc)/Ib ≈ 220Kohm
Rc= (Vcc-Vce)/Ic =1Kohm
The negative feedback increases the input impedance of amplifier.
The gain reduction caused due to negative feedback, this biasing circuit can be used whether stability is required.
This circuit is commonly used for biasing. The circuit is formed using the resistors R1 and R2.The resistors formed a potential divider arrangement and applies a fixed voltage to the base of transistor.
For Q point at the centre, Ve = 10% of Vcc ; Vce = 45% of Vcc
Re=Ve/Ie≈Ve/Ic
Rc= V Rc/Ic
Where V Rc= Vcc=Vce-V Re
Vb=Vbe + Ve =( R2/(R1+R2))Vcc
For the proper operation of circuit, the current through R1 and R2 is assumed to be approximately greater than or equal to base current.
R2=(1/10) β Re
For example, Consider Vcc=10V, Vbe=0.7V, Ic=5mA and β=250
Ve=10% of Vcc = 1V
Re= Ve/Ic =200ohm
Vce= 45% of Vcc = 4.5V
Rc= Vce/ Ic≈910A
Vb= Vbe+Ve = 1.7V
Vb= (R2/(R1+R2))Vcc
1.7R1+1.7R2 = 10R2
1.7R1=8.3R2
R2= (1/10) β Re ≈ 5.1Kohm
Then R1≈27Kohm
AC as well as DC feedback is caused by Re. It reduces the AC voltage gain of amplifier. To overcome this, an AC bypass capacitor can be used.
It is commonly used in linear circuits.
To produce desired drain current Id, the gate to source voltage is setting first. In JFET, the drain current is limited by drain to saturation current Ids. The FET has high input impedance and there are no gate current flows. The dc voltage of gate is set by voltage divider is not affected by FET.
The fixed bias is given by using a battery. This battery ensures the gate is negative with respect to source. Therefore no gate current flows through Rg. i.e, gate current Ig=0.
The battery provides a gate to source voltage Vgs for biasing the N channel JFET.
The gate to source voltage, Vgs = -Vg – Vs
= -Vgg-0
=-Vgg
Thus it is clear from the equation that the drain current is fixed. The voltage drop due to this current through Rd is
VRd = IdRd
Output voltage Vout = Vdd- IdRd
It is a common biasing circuit for biasing JFET. The reverse biased gate causes no flowing of current. So the gate current Ig = 0.
Vg= igRg= 0
The source voltage Vs= Vg- Vs = 0- IdRs = -IdRs
So the voltage drop across Rs provides the biasing voltage. It does not require any external source for biasing. That’s why it is called self biasing.
The drain to source voltage Vds = Vdd- Id (Rd+Rs)
The self biasing of JFET stabilizes the operating point against any changes in parameters.
The resistors RG1 and RG2 formed the potential divider across VDD. The necessary bias is provided by the voltage V2 across RG2. For the adjustment of dc bias point RG1 is used. The gate is reverse biased and so there is no current flow through RG. i.e, Ig = 0.
The gate voltage, Vg = V2 = ( VDD/(RG1+RG2))*RG2
VGS = Vg-Vs
= Vg-IdRs
For negative the gate to source voltage, the circuit is designed that IdRs must be greater than Vg. It provides the correct bias voltage. The operating point can be determined by,
Id = (V2 – VGS)/Rs
VDS = VDD- ID(RD+RS)
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